1. Field of the Invention
The present invention relates to an electronic component device formed by mounting an electronic component on a board via bumps, and more specifically, the present invention relates to an electronic component device implemented by using a flip chip bonding method.
2. Description of the Related Art
To date, regarding a flip chip bonding method for bonding bumps and respective wiring patterns on a board together, Japanese Unexamined Patent Application Publication No. 63-288031 discloses a flip chip bonding method in which bumps formed on respective electrodes of a semiconductor chip are aligned with respective wiring patterns on a board disposed on a heated stage, and in which pressure and ultrasonic vibration are applied to the rear surface of the chip via a tool, thereby bonding the bumps and the respective wiring patterns together.
FIG. 1 shows an example of an electronic component device. FIG. 2 illustrates a bonding method for this electronic component device. FIG. 3 shows a board of the electronic component device. Here, reference numeral 1 denotes a board, 2a and 2b each denote a wiring line, 3 denotes a bump, and 4 denotes an electronic component.
The wiring lines 2a and 2b are longitudinally and laterally arranged on the board 1, and the bumps 3 are formed in advance on respective electrodes (not shown) of the electronic component 4. The top surface of the electronic component 4 is pressed by a bonding tool 5 and is subjected to ultrasonic vibration U along a horizontal direction via the bonding tool 5, whereby the bumps 3 are bonded to the respective wiring lines 2a and 2b. 
In this way, the electronic component 4 and the wiring patterns on the board 1 are bonded together in a collective manner. This inevitably results in wiring lines extending perpendicularly to the direction of ultrasonic vibration U (hereinafter referred to as “perpendicular wiring lines”) 2a, and wiring lines extending parallel to the direction of ultrasonic vibration U (hereinafter referred to as “parallel wiring lines”) 2b being present in a mixed state. When ultrasonic vibration acts on the board 1, the board 1 attempts to deform. However, the wiring lines 2a and 2b, which have higher rigidity than the board 1, attempt to inhibit the deformation. The perpendicular wiring lines 2a, however, exhibit a small deformation inhibiting effect as compared with the parallel wiring lines 2b, which are arranged along the longitudinal direction with respect to the ultrasonic vibration, so that the perpendicular wiring lines 2a are displaced more than the parallel wiring lines 2b, as shown in FIGS. 4A and 4B (here, reference numeral 6 denotes an electrode of the electronic component 4, and a symbol δ denotes a displacement).
As a result, sufficient ultrasonic vibration does not travel to bonding interfaces between the perpendicular wiring lines 2a and the respective bumps 3, thereby making the bonding of the perpendicular wiring lines 2a imperfect as compared with the parallel wiring lines 2b. In one electronic component, if such variations in bondability occur due to the directions of wiring lines, wiring lines that are bonded earlier and those that are bonded later become mixed with each other. This causes a problem in that, when much time is spent applying ultrasonic waves until all wiring lines are sufficiently bonded, the wiring lines that are bonded earlier begin to crack.
Table 1 shows analysis results using a finite-element method, on a displacement of the wiring line and that of the board surface when a forced displacement of 1 μm is statically applied to the chip surface as ultrasonic vibration.
TABLE 1ParallelPerpendicularwiring linewiring lineADisplacement of wiring line [μm]0.660.75BDisplacement of board surface [μm]0.480.55Deformation amount of wiring line (A-B)0.180.20Deformation amount of board (equal to B)0.480.55
As shown in Table 1, the perpendicular wiring line exhibits a larger displacement than the parallel wiring line. While ultrasonic vibration is applied, displacements repeatedly occur, thereby causing a difference in bondability between the perpendicular wiring line and the parallel wiring line. As an example showing the relationship between the displacement and the bondability, FIG. 5 shows the relationship between the displacement of wiring line and the bonding strength. As can be seen from FIG. 5, the larger the displacement, the smaller the bonding strength.
When electronic components with such a difference in bondability were bonded with much expenditure of time applying ultrasonic waves, cracking in chip electrodes occurred in 10 to 50 percent of the electronic components.
To solve the above-described problem, Japanese Unexamined Patent Application Publication No. 2002-184812 proposes that, in order to make displacements of wiring lines due to ultrasonic vibration substantially uniform, the connecting section of each of the wiring lines of which the angle θ with respect to a direction of ultrasonic vibration is larger, was formed wider than the connecting section of each of the wiring lines of which the angle θ with respect to the direction of ultrasonic vibration is smaller, thereby bringing all wiring lines into a substantially uniform bonding state. More specifically, the width of each of the perpendicular wiring lines was made wider than that of each of the parallel wiring lines.
In this case, however, the connecting section of each of the perpendicular wiring lines must be formed wider and, therefore, if wiring lines are arranged at a high density, it is difficult to secure a sufficient formation width. This make it difficult to bring all wiring lines into a uniform bonding state.